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Journal Papers

  1. Srinivasan Gopal, Pawan Agarwal, Joe Baylon, Luke Renaud, Sheikh Nijam Ali, Partha Pratim Pande, Deukhyoun Heo, "A Spatial Multi-Bit Sub-1-V Time-Domain Matrix Multiplier Interface for Approximate Computing in 65-nm CMOS," in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 8, no. 3, pp. 506-518, Sept. 2018.
  2. Xian Li, Karthi Duraisamy, Paul Bogdan, Janardhan Rao Doppa and Partha Pratim Pande, “Scalable Network-on-Chip Architectures for Brain–Machine Interface Applications,” IEEE Transactions on VLSI (TVLSI), vol. 26, no. 10, pp. 1895-1907, Oct. 2018.
  3. Dongjin Lee, Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande and Krishnendu Chakrabarty, “Performance and Thermal Trade-Offs for Energy Efficient Monolithic 3D Network-on-Chip”. ACM Transaction on Design Automation of Electronic System, (TODAES), August 2018.
  4. Sheikh Nijam Ali, Pawan Agarwal, Luke Renaud, Reza Molavi, Shahriar Mirabbasi, Partha Pratim Pande and Deukhyoun Heo, "A 40% PAE Frequency-Reconfigurable CMOS Power Amplifier With Tunable Gate–Drain Neutralization for 28-GHz 5G Radios," in IEEE Transactions on Microwave Theory and Techniques, vol. 66, no. 5, pp. 2231-2245, May 2018.
  5. Pawan Agarwal, Jong-Hoon Kim, Partha Pratim Pande and Deukhyoun Heo, "Zero-Power Feed-Forward Spur Cancelation for Supply-Regulated CMOS Ring PLLs," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 4, pp. 653-662, 2018.
  6. Dongjin Lee, Sourav Das, Daehyun Kim, Janardhan Rao Doppa and Partha Pratim Pande, “Design Space Exploration of 3D Network-on-Chip: A Sensitivity-based Optimization Approach,” ACM Journal on Emerging Technologies in Computing (JETC), 14, 3, Article 32 (October 2018), 26 pages.
  7. Dongjin Lee, Sourav Das, Partha Pratim Pande, "Analyzing Power-Thermal-Performance Trade-offs in a High-Performance 3D NoC Architecture". Elsevier Journal of The Integration of VLSI, March 2018.
  8. Ryan Gary Kim, Janardhan Rao Doppa, Partha Pratim Pande, Diana Marculescu and Radu Marculescu, “Machine Learning and Manycore Systems Design: A Serendipitous Symbiosis”, IEEE Computer, Vol 51 (7) 66-77, 2018.
  9. Wonje Choi, Karthi Duraisamy, Ryan Gary Kim, Janardhan Rao Doppa, Partha Pratim Pande, Diana Marculescu and Radu Marculescu, “On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems,” IEEE Transactions on Computers (TC), May 2018. Spotlight Paper
  10. Ryan Gary Kim, Wonje Choi, Zhuo Chen, Janardhan Rao Doppa, Partha Pratim Pande, Diana Marculescu and Radu Marculescu, “Imitation Learning for Dynamic VFI Control in Large-Scale Manycore Systems,” IEEE Transactions on VLSI (TVLSI), Volume: 25, Issue: 9, Sept. 2017, pp. 2458 – 2471, 2017.
  11. Pawan Agarwal, Suman Prasad Sah, Reza Molavi, Shahriar Mirabbasi, Partha Pratim Pande, Jong-Hoon Kim and Deukhyoun Heo, "Switched Substrate-Shield Based Low Loss CMOS Inductors for Wide Tuning Range VCOs," IEEE Transactions on Microwave Theory and Techniques, vol. 65, pp. 2964-2976, Aug. 2017.
  12. Sourav Das, Dongjin Lee, Wonje Choi, Janardhan Rao Doppa, Partha Pratim Pande and Krishnendu Chakrabarty, “VFI-based Power Management to Enhance the Lifetime of High-Performance 3D NoCs,” ACM Transactions on Design Automation of Electronic Systems (TODAES), 23, 1, Article 7 (August 2017), 26 pages.
  13. Xian Li, Karthi Duraisamy, Joe Baylon, Turbo Majumder, Guopeng Wei, Paul Bogdan, Deukhyoun Heo and Partha Pratim Pande, “A Reconfigurable Wireless NoC for Large Scale Microbiome Community Analysis," IEEE Transactions on Computers (TC), vol. 66, no. 10, pp. 1653-1666, Oct. 1 2017.
  14. Karthi Duraisamy and Partha Pratim Pande, “Enabling High Performance SMART NoC Architectures Using On-Chip Wireless Links,” IEEE Transactions on VLSI (TVLSI), vol. 25, no. 12, pp. 3495-3508, Dec. 2017.
  15. Karthi Duraisamy, Yuankun Xue, Paul Bogdan and Partha Pratim Pande, “Multicast-aware High Performance Wireless Network-on-Chip Architectures,” IEEE Transactions on VLSI, Volume: 25, Issue: 3, March 2017, pp. 1126 - 1139.
  16. Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande and Krishnendu Chakrabarty, “Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3D Small-world Network-on-Chip”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD), Volume: 36, Issue: 5, May 2017, pp. 719-732.
  17. Pawan Agarwal, Suman Prasad Sah, Reza Molavi, Shahriar Mirabbasi, Partha Pratim Pande, Seung Eel Oh, Jong-Hoon Kim and Deukhyoun Heo, "Switched Substrate-Shield Based Low Loss CMOS Inductors for Wide Tuning Range VCOs", IEEE Transactions on Microwave Theory and Techniques, Vol. 65, no. 8, pp. 2964-2976, Aug. 2017.
  18. Nghia Tang, Bai Nguyen, Reza Molavi, Shahriar Mirabbasi, Yangyang Tang, Philipp Zhang, Jonghoon Kim, Partha Pratim Pande, Deukhyoun Heo, "Fully Integrated Buck Converter with Fourth-Order Low-Pass Filter," IEEE Transactions on Power Electronics, Vol. 32, no. 5, pp. 3700-3707, May 2017.
  19. Karthi Duraisamy, Hao Lu, Partha Pratim Pande and Ananth Kalyanaraman, “High Performance and Energy Efficient Network-on-Chip Architectures for Graph Analytics”, ACM transactions on Embedded Computing, Volume 15 Issue 4, August 2016, Article No. 66.
  20. Xian Li, Karthi Duraisamy, Turbo Majumder, Paul Bogdan and Partha Pratim Pande, “Network-on-Chip-Enabled Multicore Platforms for Parallel Model Predictive Control”, IEEE Transactions on VLSI, Volume: 24, Issue: 9, Sept. 2016, pp. 2837 – 2850.
  21. Ananth Kalyanaraman, Mahantesh Halappanavar, Daniel Chavarría-Miranda, Hao Lu, Karthi Duraisamy and Partha Pratim Pande, “Fast Uncovering of Graph Communities on Chip: Toward Scalable Community Detection on Multicore and Manycore Platforms”, Foundations and Trends in Electronic Design Automation, 10, 3 (August 2016), 145-247.
  22. Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Partha Pratim Pande, Vincenzo Catania, “On-Chip Communication Energy Reduction through Reliability Aware Adaptive Voltage Swing Scaling”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, no. 11, pp. 1769-1782, Nov. 2016.
  23. Ryan Gary Kim, Wonje Choi, Zhuo Chen, Partha Pratim Pande, Diana Marculescu and Radu Marculescu, “Wireless NoC and Dynamic VFI Co-Design: Energy Efficiency without Performance Penalty”, IEEE Transactions on VLSI, vol. 24, no. 7, pp. 2488-2501, July 2016. IEEE CAS 2018 Best Paper Award Winner
  24. Ryan Gary Kim, Wonje Choi, Guangshuo Liu, Ehsan Mohandesi, Partha Pratim Pande, Radu Marculescu and Diana Marculescu, “Wireless NoC for VFI-Enabled Multicore Chip Design: Performance Evaluation and Design Trade-offs”, IEEE Transactions on Computers, Vol. 65, Issue 4, pp. 1323–1336.
  25. Jacob Murray, Nghia Tang, Partha Pratim Pande, Deukhyoun Heo and Behrooz Shirazi, “DVFS Pruning for Wireless NoC Architecture”, IEEE Design and Test, Vol. 32, Issue 2, pp. 29-38.
  26. Xinmin Yu, Hooman Rashtian, Shahriar Mirabbasi, Partha Pratim Pande and Deukhyoun Heo, “An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip,” IEEE Trans. on Circuits and Systems 62-I (3): 799-806 (2015).
  27. Xinmin Yu, Suman Prasad Sah, Hooman Rashtian, Shahriar Mirabbasi, Partha Pratim Pande and Deukhyoun Heo, "A 1.2-pJ/bit 16 Gb/s 60-GHz OOK Transmitter in 65-nm CMOS for Wireless Network-On-Chip," IEEE Transactions on Microwave Theory and Techniques, vol.62, no.10, pp.2357, 2369, Oct. 2014.
  28. Paul Wettin, Ryan Kim, Jacob Murray, Xinmin Yu, Amlan Ganguly, Partha Pratim Pande and Deukhyoun Heo, “Design Space Exploration for wireless NoCs Incorporating Irregular Network Routing”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 33, Issue 11, pp. 1732-1745, Nov. 2014.
  29. Jacob Murray, Ryan Kim, Paul Wettin, Partha Pratim Pande and Behrooz Shirazi, “Performance Evaluation of Congestion-Aware Routing with DVFS on a Millimeter-Wave Small World Wireless NoC”, ACM Journal of Emerging Technologies in Computing Systems (JETC), Volume 11 Issue 2, November 2014.
  30. Xinmin Yu, Joe Baylon, Paul Wettin, Deukhyoun Heo, Partha Pratim Pande and Shahriar Mirabbasi, “Architecture and Design of Multi-Channel Millimeter-Wave Wireless Network-on-Chip”, IEEE Design and Test, Vol. 31, Issue 6, Nov/Dec 2014, pp. 19-28.
  31. Ipshia Datta, Debasish Datta and Partha Pratim Pande, "Design Methodology for Optical Interconnect Topologies in  NoCs  with BER and Transmit Power Constraints", IEEE/OSA Journal of Lightwave Technology, Vol. 32, Issue 1, January 2014, pp. 163-175
  32. Turbo Majumder, Partha Pratim Pande and Ananth Kalyanaraman, “Hardware Accelerators
    in Computational Biology: Application, Potential and Challenges”, IEEE Design and Test, Vol. 31, Issue 1, February 2014, pp. 8-18.
  33. Jacob Murray, Teng Lu, Paul Wettin, Partha Pratim Pande and Behrooz Shirazi, “Dual-Level
    DVFS-enabled Millimeter-Wave Wireless NoC Architectures”, ACM Journal of
    Emerging Technologies in Computing Systems (JETC), Volume 10, Issue 4, May 2014.
  34. Turbo Majumder, Partha Pande, Ananth Kalyanaraman, "Wireless NoC Platforms with Dynamic Task Allocation for Maximum Likelihood Phylogeny Reconstruction", IEEE Design and Test, Volume:31, Issue 3, June 2014, pp. 54-64.
  35. Haera Chung, Christof Teuscher and Partha Pratim Pande, Design and Evaluation of Technology-Agnostic Heterogeneous Networks-on-Chip, ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 10 Issue 3, April 2014 Article No. 20.
  36. Turbo Majumder, Partha Pande, Ananth Kalyanaraman, “High-Throughput, Energy-Efficient Network-on-Chip-Based Hardware Accelerators”, Sustainable Computing, Informatics and Systems (SUSCOM), Elsevier,Volume 3, Issue 1, March 2013, Pages 36–46.
  37. Jacob Murray, Teng Lu, Partha Pratim Pande and Behrooz Shirazi, "Sustainable DVFS-Enabled Multi-Core Architectures with On-Chip Wireless Links", Advances in Computer 88: 125-158 (2013)

  38. Sujay Deb, Kevin Chang, Xinmin Yu, Suman Sah, Miralem Cosic, Amlan Ganguly, Partha Pratim Pande, Benjamin Belzer and Deukhyoun Heo, “Design of an Energy Efficient CMOS Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects”, Transactions on Computers (TC),Vol.62, no.12, pp.2382-2396, Dec. 2013.
  39. Paul Wettin, Anuroop Vidapalapati, Amlan Ganguly and Partha Pratim Pande, Complex Network Enabled Robust Wireless Network-on-Chip Architectures”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 9, Issue 3, September 2013.
  40. Sujay Deb, Amlan Ganguly, Partha Pratim Pande, Benjamin Belzer and Deukhyoun Heo, Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 2, No.2, June 2012, pp. 228-239.
  41. Turbo Majumder, Partha Pratim Pande and Ananth Kalyanraman, On-Chip Network-Enabled Multi-Core Platforms Targeting Maximum Likelihood Phylogeny Reconstruction IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 31, No.7, July 2012, pp. 1061-1073.
  42. Kevin Chang, Sujay Deb, Amlan Ganguly, Xinmin Yu, Suman Prasad Sah, Partha Pratim Pande, Benjamin Belzer and Deukhyoun Heo, Performance Evaluation and Design Trade-Offs for Wireless Network-on-Chip Architectures, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 8, No. 3, August 2012.
  43. Turbo Majumder, Souradip Sarkar, Partha Pratim Pande, Ananth Kalyanaraman, “NoC-Based Hardware Accelerator for Breakpoint Phylogeny”, IEEE Transactions on Computers, Vol. 61, N0. 6, June 2012, pp. 857-869.
  44. Partha Pande and Sriram Vangal, Guest Editors' Introduction: Promises and Challenges of Novel Interconnect Technologies”, IEEE Design and Test of Computers, Volume 27, Issue 4, July/August 2010, pp. 6-9.
  45. Amlan Ganguly, Kevin Chang, Sujay Deb, Partha Pande, Benjamin Belzer, Christof Teuscher, Scalable Hybrid Wireless Network-on-Chip Architectures for Multi-Core Systems, IEEE Transactions on Computers, Vol. 60, Issue 10, 2010, pp. 1485-1502 .
  46. Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pratim Pande, Ananth Kalyanaraman, "Network-on-Chip Hardware Accelerators for Biological Sequence Alignment" IEEE Transactions on Computers, Vol. 59, Issue 1, January 2010, pp. 29-41.
  47. Amlan Ganguly, Partha Pratim Pande and Benjamin Belzer, "Crosstalk-Aware Channel Coding Schemes for Energy Efficient and Reliable NoC Interconnects", IEEE Transactions on VLSI Vol. 17, No.11, November 2009, pp. 1626-1639.
  48. Brett S. Feero and Partha Pratim Pande, "Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation", IEEE Transactions on Computers, Vol. 58, No. 1, January 2009, pp. 32-45.
  49. Partha Pratim Pande, Amlan Ganguly, Haibo Zhu, Cristian Grecu, "Energy Reduction through Crosstalk Avoidance Coding in Networks on Chip", Journal of System Architecture (JSA), Vol. 54/ 3-4, March-April 2008, pp.441-451.
  50. Amlan Ganguly, Partha Pratim Pande, Benjamin Belzer, Cristian Grecu, "Design of Low power & Reliable Networks on Chip through joint Crosstalk Avoidance and Multiple Error Correction Coding", Journal of Electronic Testing: Theory and Applications (JETTA), Special Issue on Defect and Fault Tolerance, June 2008, pp. 67-81.
  51. Cristian Grecu, André Ivanov, Res Saleh, Partha Pratim Pande  "Testing Network on Chip  Communication Fabrics", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 26, No. 2, December 2007, pp. 2201-2214.
  52. Resve Saleh, Steve Wilton, Shahriar Mirabbasi, Alan Hu, Mark Greenstreet, Guy Lemieux, Partha Pratim Pande, Cristian Grecu, André Ivanov "System-on-Chip: Reuse and Integration" , Proceedings of IEEE, Volume 94, issue 6, June 2006 pp. 1050-1069.
  53. Partha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh, Giovanni De Micheli, "Design, Synthesis and Test of Networks on Chip: Challenges and Solutions ", IEEE Design and Test of Computers, Volume 22,  Issue 5,  Sept.-Oct. 2005 pp. 404 – 413.
  54. Cristian Grecu, Partha Pratim Pande ,André Ivanov, Res Saleh, "Timing Analysis of Network on Chip Architectures for MP-SoC Platforms ", Microelectronics Journal, Elsevier, Vol. 36, issue 9, pp. 833-845.
  55. Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh, "Performance Evaluation and Design Trade-offs for Network on Chip Interconnect Architectures”, IEEE Transactions on Computers, vol. 54,  no. 8,  pp. 1025-1040,  August  2005.

Conference/ Workshop Papers

  1. Biresh Kumar Joardar, Karthi Duraisamy and Partha Pratim Pande, “High Performance Collective Communication-Aware 3D Network-on-Chip Architectures,” Proceedings of IEEE Design, Automation and Test in Europe, DATE 2018.
  2. Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty, “Monolithic 3D-enabled High Performance and Energy Efficient Network-on-Chip,” Proceedings of IEEE/ACM International Conference on Computer Design, ICCD 2017.
  3. Sourav Das, Srinivasan Gopal, Deukhyoun Heo, Partha Pratim Pande, “Energy-Efficient and Robust 3D NoCs with Contactless Vertical Links,” Proceedings of IEEE/ACM International Conference on Computer Aided Design, ICCAD 2017. Invited Paper
  4. Sudeep Pasricha, Janardhan Rao Doppa, Krishnendu Chakrabarty, Saideep Tiku, Daniel Dauwe, Shi Jin, Partha Pratim Pande, “Data Analytics Enables Energy-Efficiency and Robustness: From Mobile to Manycores, Datacenters, and Networks,” Proceedings of International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Embedded Systems Week, 2017.
  5. Biresh Kumar Joardar, Wonje Choi, Ryan Gary Kim, Janardhan Rao Doppa, Partha Pratim Pande, Diana Marculescu and Radu Marculescu, “3D NoC-Enabled Heterogeneous Manycore Architectures for Accelerating CNN Training: Performance and Thermal Trade-offs,” Proceedings of IEEE/ACM Network-on-Chip Symposium, NOCS 2017.
  6. Srinivasan Gopal, Sourav Das, Deukhyoun Heo, Partha Pratim Pande, “Energy and Area Efficient Near Field Inductive Coupling: A Case Study on 3D NoC,” Proceedings of IEEE/ACM Network-on-Chip Symposium, NOCS 2017. Best Paper Award Nomination
  7. Karthi Duraisamy, Hao Lu, Partha Pratim Pande and Ananth Kalyanaraman, “Accelerating Graph Community Detection with Approximate Updates via an Energy-Efficient NoC,” Proceedings of the Design Automation Conference, DAC 2017.
  8. Dongjin Lee, Sourav Das and Partha Pratim Pande, “Performance-Thermal Trade-offs for a VFI-Enabled 3D NoC Architecture,” Proceedings of the International Symposium on Quality Electronic Design, ISQED 2017. Best Paper Award Winner
  9. Karthi Duraisamy and Partha Pratim Pande, “Performance Evaluation and Design Tradeoffs for Wireless-enabled SMART NoC,” Proceedings of IEEE Design, Automation and Test in Europe, DATE 2017.
  10. Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande and Krishnendu Chakrabarty, “Robust TSV-based 3D NoC Design to Counteract Electromigration and Crosstalk Noise,” Proceedings of IEEE Design, Automation and Test in Europe, DATE 2017.
  11. Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande and Krishnendu Chakrabarty, “Energy-Efficient and Reliable 3D Network-on-Chip (NoC): Architectures and Optimization Algorithms,” Proceedings of IEEE/ACM International Conference on Computer Aided Design, ICCAD 2016. Invited Paper
  12. Wonje Choi, Karthi Duraisamy, Ryan Gary Kim, Janardhan Rao Doppa, Partha Pratim Pande, Radu Marculescu and Diana Marculescu, “Hybrid Network-on-Chip Architectures for Accelerating Deep Learning Kernels on Heterogeneous Manycore Platforms,” Proceedings of the International Conference on Compilers, Architectures and Synthesis of Embedded Systems, CASES 2016.
  13. Paul Bogdan, Miroslav Pajic, Partha Pratim Pande and Vijay Raghunathan, “Making the Internet-of-Things a Reality: From Smart Models, Sensing and Actuation to Energy-Efficient Architectures,” Proceedings of CODES+ISSS, 2016.
  14. Paul Bogdan, Partha Pratim Pande, Hussam Amrouch, Muhammad Shafique, Jörg Henkel, “Power and Thermal Management in Massive Multicore Chips: Theoretical Foundation meets Architectural Innovation and Resource Allocation,” Proceedings of the International Conference on Compilers, Architectures and Synthesis of Embedded Systems, CASES 2016.
  15. Sheng-En(David) Lin, Partha Pratim Pande, Dae Hyun Kim, “Optimization of Dynamic Power Consumption in Multi-Tier Gate-Level Monolithic 3D ICs”, To appear in the Proceedings of IEEE International Symposium on Quality Electronic Design, ISQED 2016.
  16. Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande and Krishnendu Chakrabarty, “Reliability and Performance Trade-offs for 3D NoC-Enabled Multicore Chips”, To appear in the Proceedings of IEEE Design, Automation and Test in Europe, DATE 2016.
  17. Sourav Das, Janardhan Rao Doppa, Dae Hyun Kim, Partha Pratim Pande and Krishnendu Chakrabarty, “Optimizing 3D NoC Design for Energy Efficiency: A Machine Learning Approach”, Proceedings of IEEE/ACM International Conference on Computer Aided Design, ICCAD 2015.
  18. Partha Pratim Pande, Ryan Gary Kim, Wonje Choi, Zhuo Chen, Diana Marculescu and Radu Marculescu, “The (Low) Power of Less Wiring: Enabling Energy Efficiency in Many-Core Platforms Through Wireless NoC ”, Proceedings of IEEE/ACM International Conference on Computer Aided Design, ICCAD 2015. Invited Paper
  19. Karthi Duraisamy, Hao Lu, Partha Pratim Pande and Ananth Kalyanaraman, “High Performance and Energy Efficient Wireless NoC-Enabled Multicore Architecture for Graph Analytics”, Proceedings of the International Conference on Compilers, Architectures and Synthesis of Embedded Systems, CASES 2015. Best Paper Award Nomination
  20. T. N. Nguyen, P. P. Pande, and D. Heo “A 64 GHz 5 mW Low Phase Noise Gm-boosted Colpitts CMOS VCO with Self-switched Biasing Technique,” in Proc. IEEE MTT Intl. Microwave Symposium (IMS) 2015.
  21. P. Agarwal, P. P. Pande, and D. Heo “25.3 GHz, 4.1 mW VCO with 34.8% Tuning Range Using a Switched Substrate-Shield Inductor,” in Proc. IEEE MTT Intl. Microwave Symposium (IMS) 2015.
  22. Karthi Duraisamy, Ryan Gary Kim, Wonje Choi, Guangshuo Liu, Partha Pratim Pande, Radu Marculescu and Diana Marculescu, “Energy Efficient MapReduce with VFI-enabled multicore Platforms”, IEEE/ACM Design Automation Conference, DAC 2015.
  23. Sourav Das, Dongjin Lee, Dae Hyun Kim and Partha Pratim Pande, “Small-World Network Enabled Energy Efficient and Robust 3D NoC Architectures”, Proceedings of ACM GLSVLSI, 2015.
  24. Turbo Majumder, Partha Pratim Pande and Ananth Kalyanaraman, “On-Chip Network-Enabled Many-Core Architectures for Computational Biology Applications”, IEEE Design, Automation and Test in Europe, DATE 2015.
  25. Turbo Majumder, Xian Li, Paul Bogdan and Partha Pratim Pande, “NoC-Enabled Multicore Architectures for Stochastic Analysis of Biomolecular Reactions”, IEEE Design, Automation and Test in Europe, DATE 2015.
  26. Karthi Duraisamy, Ryan Gary Kim, Partha Pratim Pande, “Enhancing Performance of Wireless NoCs with Distributed MAC Protocols”, IEEE International Symposium on Quality Electronic Design, ISQED 2015.
  27. Ryan Kim, Guangshuo Liu, Paul Wettin, Radu Marculescu, Diana Marculescu, Partha Pratim Pande, “Energy-Efficient VFI-Partitioned Multicore Design Using Wireless NoC Architectures”, Proceedings of the International Conference on Compilers, Architectures and Synthesis of Embedded Systems, CASES 2014.
  28. Ryan Kim, Jacob Murray, Paul Wettin, Partha Pratim Pande, Behrooz Shirazi, “An Energy-Efficient Millimeter-Wave Wireless NoC with Congestion-Aware Routing and DVFS”, Proceedings of ACM/IEEE International Symposium on Networks-on-Chip, NOCS 2014.
  29. Jacob Murray, Paul Wettin, Ryan Kim, Xinmin Yu, Partha Pratim Pande, Behrooz Shirazi, Deukhyoun Heo, “Thermal Hotspot Reduction in mm-Wave Wireless NoC Architectures”, Proceedings of the IEEE International Symposium on Quality Electronic Design, ISQED 2014.
  30. Paul Wettin, Jacob Murray, Ryan Kim, Xinmin Yu, Partha Pratim Pande and Deukhyoun Heo, “Performance Evaluation of Wireless NoCs in Presence of Irregular Network Routing Strategies”, Proceedings of IEEE Design, Automation and Test in Europe (DATE), 2014.
  31. S. P. Sah, X. Yu, P. Agarwal, H. Rashtian, P. P. Pande, D. Heo and Shahriar Mirabbasi, "A V-band Wide Locking Range Injection Locked CMOS VCO for Wireless Network-on-Chip Receiver ", Proceedings of IEEE International Microwave Symposium (IMS),  2013.
  32. Jacob Murray, Paul Wettin, Partha Pande, Behrooz Shirazi, Nishad Nerurkar and Amlan Ganguly, “Evaluating Effects of Thermal Management in Wireless NoC-Enabled Multicore Architectures”, Proceedings of IEEE International Green Computing Conference (IGCC), 2013.
  33. Paul Wettin, Partha Pratim Pande, Deukhyoun Heo, Benjamin Belzer, Sujay Deb and Amlan Ganguly, “Design Space Exploration for Reliable mm-Wave Wireless NoC Architectures”, Proceedings of IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2013.
  34. Turbo Majumder, Partha Pratim Pande and Ananth Kalyanaraman, “Network-on-chip with long-range wireless links for high-throughput scientific computation”, Proceedings of IPDPS workshop on Communication Architecture for Scalable Systems (CASS), 2013.
  35. Jacob Murray, Rajath Hegde, Teng Lu, Partha Pratim Pande and Behrooz Shirazi, “Sustainable Dual-Level DVFS-enabled NoC with on-chip Wireless Links”, Proceedings of the IEEE International Symposium on Quality Electronic Design, ISQED 2013.
  36. Paul Wettin, Jacob Murray, Partha Pratim Pande, Behrooz Shirazi and Amlan Ganguly, Energy-Efficient Multicore Chip Design Through Cross-Layer Approach, Proceedings of IEEE Design, Automation and Test in Europe (DATE), 2013.
  37. Jacob Murray, Partha Pratim Pande and Behrooz Shirazi, DVFS-Enabled Sustainable Wireless NoC Architecture”, Proceedings of IEEE International System-on-Chip Conference (SOCC), September 2012.
  38. Sujay Deb, Kevin Chang, Miralem Cosic, Amlan Ganguly, Partha Pande, Deukhyoun Heo and Benjamin Belzer, CMOS Compatible Many-Core NoC Architectures with Multi-Channel Millimeter-Wave Wireless Links, Proceedings of ACM Great Lake Symposium on VLSI, GLSVLSI 2012.
  39. Jacob Murray, John Klingner, Partha Pande and Behrooz Shirazi, “Sustainable Multi-Core Architecture with on-chip Wireless Links”, Proceedings of ACM Great Lake Symposium on VLSI, GLSVLSI 2012.
  40. Sujay Deb, Kevin Chang, Amlan Ganguly, Xinmin Yu, Christof Teuscher, Partha Pande, Deuk Heo and Benjamin Belzer, Design of an Efficient NoC Architecture using Millimeter-Wave Wireless Links”, Proceedings of the IEEE International Symposium on Quality Electronic Design, ISQED 2012.
  41. Ipshita Datta, Debasish Datta and Partha Pratim Pande, “BER-based Power Budget Evaluation for Optical Interconnect Topologies in NoCs”, Proceedings of the IEEE International Symposium on Circuits and Systems, ISCAS 2012.
  42. Amlan Ganguly, Partha Pratim Pande and Benjamin Belzer, A Unified Error Control Coding Scheme to Enhance the Reliability of a Hybrid Wireless Network-on-ChipProceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011.
  43. Xinmin Yu, Suman Prasad Sah, Sujay Deb, Partha Pratim Pande, Benjamin Belzer and Deukhyoun Heo, “A Wideband Body-Enabled Millimeter-Wave Transceiver for Wireless  Network-on-Chip”, Proceedings of the 54th IEEE Midwest Symposium on Circuits and Systems 2011.
  44. Amlan Ganguly, Paul Wettin, Kevin Chang, Partha Pande, “Complex Network Inspired Fault-tolerant NoC Architectures with Wireless links”, Proceedings of the fifth ACM/IEEE International Symposium on Networks-on-Chip 2011.
  45. Partha Pande, Fabien Clermidy, Diego Puschini, Imen Mansouri, Paul Bogdan, Radu Marculescu and Amlan Ganguly, Sustainability through Massively Integrated Computing: Are We Ready to Break the Energy Efficiency Wall for Single-Chip Platforms?, Proceedings of DATE 2011.
  46. Radu Marculescu, Christof Teuscher and Partha Pande, “Unconventional fabrics, architectures, and models for future multi-core systems”, Proceedings of CODES+ISSS 2010.
  47. Sujay Deb, Kevin Chang, Amlan Ganguly and Partha Pande, “Comparative Performance Evaluation of Wireless and Optical NoC Architectures”, Proceedings of IEEE International SOC Conference (SOCC), 27th-29th September 2010.
  48. Sujay Deb, Amlan Ganguly, Kevin Chang, Partha Pande, Benjamin Belzer and Deuk Heo, Enhancing Performance of Network-on-Chip Architectures with Millimeter-Wave Wireless Interconnects”, Proceedings of IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 7th – 9th July, 2010.
  49. Turbo Majumder, Souradip Sarkar, Partha Pande, Ananth Kalyanaraman, An Optimized NoC Architecture for Accelerating TSP Kernels in Breakpoint Median Problem” Proceedings of IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 7th – 9th July, 2010.
  50. Souradip Sarkar, Turbo Majumder, Ananth Kalyanaraman, Partha Pratim Pande, “Hardware Accelerators for Biocomputing: A Survey”, Proceedings of IEEE International Symposium on Circuits and Systems, ISCAS 2010, 30th May – 2nd June, 2010.
  51. Luca P. Carloni, Partha Pande and Yuan Xie, "Networks-on-Chip in Emerging Interconnect Paradigms: Advantages and Challenges", Proceedings of the IEEE International Symposium on Networks-On-Chip, 10-13 May 2009.
  52. Amlan Ganguly, Kevin Chang, Partha Pratim Pande, Benjamin Belzer and Alireza Nojeh, "Performance Evaluation of Wireless Networks on Chip Architectures", Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED), 16th-18th March 2009.
  53. A. Nojeh, P. Pande, A. Ganguly, S. Sheikhaei, B. Belzer and A. Ivanov, "Reliability of wireless on-chip interconnects based on carbon nanotube antennas" , Proceedings of IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW) June 2008.
  54. Partha Pratim Pande, Amlan Ganguly, Benjamin Belzer, Alireza Nojeh, Andre Ivanov, "Novel Interconnect Infrastructures for Massive Multicore Chips – An Overview", Proceedings of IEEE International Symposium on Circuits and Systems, (ISCAS), 18th-21st May, 2008.
  55. Jabulani Nyathi, Souradip Sarkar, Partha Pratim Pande, "Multiple Clock Domain Synchronization for Network on Chip Architectures" Proceedings of IEEE International SoC Conference, SOCC 2007, 26th-29th September 2007
  56. Haibo Zhu, Partha Pratim Pande, Cristian Grecu, "Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics," Proceedings of 18th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2007, July 9th - 11th, 2007.
  57. Cristian Grecu, Lorena Anghel, Partha Pratim Pande, André Ivanov, Res Saleh, "Essential Fault-Tolerance Metrics for NoC Infrastructures", Proceedings of  IEEE International Online Testing Symposium (IOLTS), 9th-11th July, 2007
  58. Partha Pratim Pande, Amlan Ganguly, Brett Feero, Cristian Grecu, "Applicability of Energy Efficient Coding Methodology to address Signal Integrity in 3D NoC Fabrics", Proceedings of  IEEE International Online Testing Symposium (IOLTS), 9th-11th July, 2007
  59. Amlan Ganguly, Partha Pratim Pande, Benjamin Belzer, Cristian Grecu, "Addressing Signal Integrity in Networks on Chip Interconnects through Crosstalk-Aware Double Error Correction Coding", Proceedings of  IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 9th-11th May 2007
  60. Brett Feero, Partha Pratim Pande, "Performance Evaluation for Three-Dimensional Networks-on-Chip", Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 9th-11th May 2007
  61. Cristian Grecu, André Ivanov, Partha Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu, "Towards Open Network-on-Chip Benchmarks", Proceedings of  IEEE International Symposium on Networks-on-Chip (NOCS' 07), 7-9 May 2007, pp :205 - 212
  62. Cristian Grecu, André Ivanov, Res Saleh, Partha Pratim Pande, "NoC Interconnect Yield Improvement  Using Crosspoint Redundancy", Proceedings of 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI  Systems (DFT'06), 2nd-4th October 2006
  63. Partha Pratim Pande, Amlan Ganguly, Brett Feero, Benjamin Belzer, Cristian Grecu, "Design of Low Power and Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding", Proceedings of 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI  Systems (DFT'06), 2nd-4th October 2006
  64. Partha Pratim Pande, Haibo Zhu, Amlan Ganguly, Cristian Grecu, "Crosstalk-aware Energy Reduction in NoC Communication Fabrics" Proceedings of IEEE International SOC Conference, SOCC 2006, 24th-27th September, 2006
  65. Partha Pratim Pande, Haibo Zhu, Amlan Ganguly, Cristian Grecu, Energy Reduction through Crosstalk Avoidance Coding in NoC ParadigmProceedings of 9th Euromicro Conference on Digital System Design, DSD 2006, 30th August-1st September 2006
  66. Cristian Grecu, André Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande, "On-line Fault Detection and Location for NoC Interconnects",  Proceedings of  12th IEEE International On-Line Testing Symposium, IOLTS 2006, July 10-12 2006
  67. Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh, BIST for Network on Chip Interconnect Infrastructures" Proceedings of 24th IEEE VLSI Test Symposium, VTS 2006, 30th April – 4th May, 2006
  68. Cristian Grecu, Partha Pratim Pande, Baosheng Wang, André Ivanov, Res Saleh, "Methodologies and Algorithms for Testing Switch-Based NoC Interconnects", Proceedings of  IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2005), 3-5th October, 2005, Monterey, USA.
  69. Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh, Effect of traffic localization on energy dissipation in NoC-based interconnect infrastructures, Proceedings of IEEE International Symposium on Circuits and Systems, ISCAS 2005, 23-26th May ,Kobe Japan
  70. Cristian Grecu, Partha Pratim Pande, Baosheng Wang, André Ivanov "Methodologies and Algorithms for testing Switch-based NoC Interconnects" Proceedings of  IEEE International Workshop on Infrastructure IP (I-IP), May 4-5 2005, Palm Springs, California
  71. Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh, "Evaluation of MP-SoC Interconnect Architectures: A Case Study", Proceedings of 4th IWSOC, 19th-21st July, 2004,Banff,Alberta, Canada.
  72. Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh "Structured Interconnect Architecture: A Solution for the Non-Scalability of Bus-Based SoCs", Proceedings of GLSVLSI 2004, 26-28th April,Boston
  73. Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh, "A Scalable Communication-Centric SoC Interconnect Architecture", Proceedings of IEEE International Symposium on Quality Electronic Design, ISQED 2004, San Jose, California, USA, 22-24 March, 2004 
  74. Partha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh, "Design of a Switch for Network on Chip Applications", IEEE International Symposium on Circuits and Systems, ISCAS 2003, Vol. V, pp. 217-220, Bangkok, Thailand
  75. Partha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh, "Switch-Based Interconnect Architecture for Future Systems on Chip", Proceedings of SPIE, VLSI Circuits and Systems, Vol. 5117, pp. 228-237, 2003, Maspalomas,Gran Canaria,Spain
  76. Partha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh, "High-Throughput Switch-Based Interconnect for Future SoCs", Proceedings of The 3rd IEEE International Workshop on SoC for Real Time Applications, pp. 304-310, 2003, Calgary, Canada

 

 

 

 

 

 

 

 


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